Synopsys, a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, on Tuesday Wednesday announced that Samsung Electronics has widely deployed the Design Compiler Graphical product, Synopsys’premium RTL Synthesis solution, to reduce power and area to deliver more competitive SoCs for the mobile market.

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Advanced technologies in Design Compiler Graphical, a key component of Synopsys’ Galaxy Implementation Platform, including congestion optimization, advanced placement-based timing optimization and physical guidance to Synopsys’ IC Compiler™ place and route solution,enableSamsung to achieve their challenging design goals and meet their schedule.

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“Reducing area and power consumption while meeting performance goalsis critical to the success of mobile SoCstargeted for today’s mobile computing devices,” said Kee Sup Kim, vice president of System LSI Infrastructure Design Center, Samsung Electronics. “We are using Design Compiler Graphical to help us deal with such technical challenges, and through the tight correlation with IC Compiler we achieve predictable implementation that meets our target design schedules to deliver value-added products for our customers.”

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“Leaders in the mobile market,such as Samsung,rely on Design Compiler Graphical to get theirproducts to market faster,” said Antun Domic, senior vice president and general manager of Synopsys’Implementation Group. “Design Compiler Graphical’sinnovative synthesis technologies enable them to meet aggressive design and schedule goals that are essential to winning in this highly competitive space.”

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